NXP Semiconductors /MIMXRT1021 /IOMUXC /SW_MUX_CTL_PAD_GPIO_AD_B1_11

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SW_MUX_CTL_PAD_GPIO_AD_B1_11

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALT0)MUX_MODE 0 (DISABLED)SION

MUX_MODE=ALT0, SION=DISABLED

Description

SW_MUX_CTL_PAD_GPIO_AD_B1_11 SW MUX Control Register

Fields

MUX_MODE

MUX Mode Select Field.

0 (ALT0): Select mux mode: ALT0 mux port: USB_OTG1_ID of instance: anatop

1 (ALT1): Select mux mode: ALT1 mux port: FLEXPWM1_PWMB02 of instance: flexpwm1

2 (ALT2): Select mux mode: ALT2 mux port: LPUART4_RX of instance: lpuart4

3 (ALT3): Select mux mode: ALT3 mux port: USDHC1_WP of instance: usdhc1

4 (ALT4): Select mux mode: ALT4 mux port: FLEXIO1_FLEXIO04 of instance: flexio1

5 (ALT5): Select mux mode: ALT5 mux port: GPIO1_IO27 of instance: gpio1

6 (ALT6): Select mux mode: ALT6 mux port: GPT2_COMPARE1 of instance: gpt2

SION

Software Input On Field.

0 (DISABLED): Input Path is determined by functionality

1 (ENABLED): Force input path of pad GPIO_AD_B1_11

Links

() ()